news

Oct 20, 2025 Our paper on Viterbi acceleration was accepted to ICDE 2026. Congrats to Ziheng for leading this solid work!
Oct 14, 2025 Our new survey on system-aware KV cache optimization went live on TechRxiv [🔗 Link], together with an accompanying Awesome-style GitHub repository [🔗 Link]. ⭐️⭐️
Aug 11, 2025 Fortunate to have joined the TMLR Group (Melb) and to be working with Dr Feng Liu and the team.
Dec 17, 2024 Officially graduated with a PhD from The University of Western Australia! 🎓 🎉
Jun 4, 2024 Our paper on BN exact inference acceleration was accepted to TPDS.
May 1, 2024 Our paper PGM inference acceleration was accepted to USENIX ATC 2024.
Feb 27, 2024 Our paper on multi-fidelity HPO was accepted to CVPR 2024.
Oct 20, 2023 Our paper BN structure learning acceleration was accepted to TPDS. Congrats to Jian for leading this work!
May 15, 2023 Our paper K-means was accepted to TNNLS. Congrats to Xueying for leading this exciting research!
Nov 7, 2022 Our paper on BN exact inference acceleration was accepted to PPoPP 2023.
Sep 9, 2022 Presented on CSSE Research Conference 2022 (held by CSSE, UWA) and won the Best Paper Award.
Apr 28, 2022 Arrived at Perth! ✨ 😊 [Video of UWA Campus]
Jan 23, 2022 Our paper BN structure learning acceleration was accepted to IPDPS 2022.
Jul 7, 2021 Our paper Parallel and Distributed Structured SVM Training was accepted to TPDS.
May 31, 2021 Officially started my PhD study at The University of Western Australia.
Nov 22, 2019 Our paper on FPGA acceleration for OpenCL-based applications was accepted to FPGA 2020.